1. Field of the Invention
The present invention relates to a method for producing a silicon monocrystal used for fabrication of a semiconductor integrated circuit device and the like, and a silicon monocrystal wafer.
2. Description of the Related Art
A silicon monocrystal wafer used as a substrate for a semiconductor integrated circuit device is manufactured mostly by the Czochralski method (CZ method). CZ method is a method wherein a seed crystal of a silicon monocrystal is immersed in a silicon melt molten at high temperature of 1420.degree. C. or more in a quartz crucible, and then gradually pulled with rotating the quartz crucible and the seed crystal to grow a silicon monocrystal in a columnar shape. Generally, a larger diameter of a crystal to be grown results in higher solidification latent heat which is radiated on solidification of a melt, and requires a lower pulling rate. For example, the pulling rate for a crystal having a diameter of 200 mm is generally 0.40 to 1.5 mm/min. When a wafer made of the silicon monocrystal thus manufactured is subjected to a high temperature thermal oxidation treatment at 1000.degree. C. or more, there is sometimes caused in the wafer an oxidation-induced stacking faults in a ring shape distribution (hereinafter referred to as a ring OSF).
However, in a silicon monocrystal wafer manufactured with a relatively high pulling rate, the ring OSF gets out of the wafer, or is present at the peripheral portion of the wafer, and at the inner part of the wafer, vacancies which are lattice points having no silicon atoms are incorporated excessively at a solid-liquid interface and are aggregated to grow into a observable defect on cooling of the crystal, which is referred to as a grown-in defect. Fusegawa et al. have first disclosed that the grown-in defect can be observed by using a Secco etching solution which can reveal the defect selectively (Japanese Patent Application Laid-open (kokai) No 4-192345). The defect is referred to as FPD (Flow Pattern Defect). Afterward, other methods to detect the defect have been studied to find defects such as those referred to as COP (Crystal Originated Particle), LSTD (Laser Scattering Tomograph Defect). However, recent studies have revealed that they are the same. Namely, observation and analysis using an electron microscope revealed that they are voids in a shape of an octahedron formed by aggregation of vacancies (occasionally referred to as Negative crystal).
The size of the grown-in defect is 0.2 .mu.m at the largest, and therefore such a defect had almost no effect on yield of the device, when the degree of integration of the device was small, and the design rule was one .mu.m or more. However, it has been revealed that the defect has adverse effect on the device when the design rule is one .mu.m or less. When the grown-in defect exists in or near the device active layer, junction leak failure is caused. When the grown-in defect exists on the surface of the wafer, oxide dielectric breakdown voltage failure, junction leak failure or the like is caused. Accordingly it is necessary to decrease density and size of grown-in defects, or eliminate them, or prevent formation of the defects in order to cope with increase of a degree of integration in a device.
In order to prevent formation of the grown-in defect due to vacancies, there have been developed and manufactured by way of trial in about 1990 so-called low pulling speed crystal wherein a ring OSF at the peripheral portion of the wafer is constringed to a center portion of the wafer (crystal). It is well known by the manufacturers of crystal that a lower pulling rate results in a smaller diameter of the ring OSF, and the ring OSF is constringed to a center portion of the crystal at a pulling rate not higher than a certain rate. However, such lowering of a pulling rate in manufacture of a wafer has been averted, since OSF formed on the surface becomes the largest, which has adverse effect on the device formed thereon, and productivity is lowered because of low pulling speed.
In such a circumstance, Shinoyama et al. disclosed that a lower pulling rate results in constriction and elimination of the ring OSF at the center portion of the crystal (Ouyoubutsuri (Applied Physics), 60, p.766, 1991). Higetsu et al. presented that an oxide dielectric breakdown voltage failure was caused on the inside of the ring OSF of the wafer, but it was not caused on the outside thereof (at the 7th crystallography symposium of the crystallography subcommittee of Japan Society of Applied Physics, p.27, 1990). The presentation triggered development and manufacture by way of trial of low pulling speed crystal. W. V. Ammon et al. made experiments and revealed that a pulling rate at which a ring OSF is constringed at the center portion of the crystal, Pcrit (mm/min) is proportional to a temperature gradient G in the center of crystal (.degree. C./mm) along the pulling direction, and can be given by using the following formula: Pcrit/G=0.13 mm.sup.2 /.degree. C. min, and they published it (Japanese Patent Application Laid-open (kokai) No. 7-257991, and Journal of Crystal Growth vol. 151, p. 273-277, 1995). This is the first work which experimentally shows the theory proposed by Voronkov that type and density of excessive point defect depend on P/G (V. V. Voronkov: Journal of Crystal Growth, vol. 59, p.625, 1982).
However, manufacturers of crystal have recognized that preferentially etched pits, which are completely different in a size and a shape from those of FPD, that is a grown-in defect due to vacancies, are observed on the outside of the ring OSF, or on the wafer wherein the ring OSF is constringed to be eliminated (hereafter generically referred to as outside of the ring OSF, since it is the same as the wafer wherein the region outside of the ring OSF extends all over the surface). They have not come into question at an early stage, since they have been considered as having no effect on an oxide dielectric breakdown voltage. However, it was revealed that a failure due to leakage occurred in the yield of the device. Accordingly, there arose necessity of a wafer wherein there exists no grown-in defect (hereafter referred to as LEP) which leads to the large preferentially etched pit (herein referred to as Large Etch Pit, and abbreviated to as LEP; occasionally referred to as interstitial dislocation loop, dislocation cluster, large dislocation).
It has thus revealed that completely different grown-in defects generate on the inside and the outside of the ring OSF region. As mentioned above, it is now evident that FPD which is the grown-in defect on the inside of the ring OSF is a void resulting from aggregation of vacancies. However, LEP existing at low density on the outside thereof has not yet been identified. From a comparison with the results of the studies relating to grown-in defects with a floating zone method (FZ method), it is predicted that LEP is an aggregate of interstitial silicon atoms, and is a dislocation loop and a cluster thereof. They are also grown-in defects as they are formed during cooling of crystal.
As described above, the development of the wafer having none of FPD, LEP and the ring OSF has become important and necessary for the manufacturers of crystal.
Hourai et al. disclosed data implying probability of a wafer wherein none of FPD, LEP and the ring OSF exists (M. Hourai et al. :Progress in Semiconductor Fabrication, SEMICON/Europe, 1993 Technical Conference, Geneva, March/April, 1993). The data are shown in FIG. 1, which is a sketch showing approximately one fourth part of the wafer which is taken with X-ray topography after decorating grown-in defects by thermal diffusion of copper. As shown in the figure, there is a region having no grown-in defect between the ring OSF region and LEP (dislocation loop and cluster thereof) region. Namely, it was implied to form the region there exists neither FPD nor LEP (dislocation cluster) outside of the ring OSF, and to enlarge the region by controlling the crystal growing condition.
Then, Hourai et al. invented a silicon monocrystal wafer grown in accordance with CZ method at a low growth rate wherein oxidation-induced stacking fault (ring OSF) generated in a ring shape when subjected to thermal oxidation treatment disappears at a center portion of the wafer, and a dislocation cluster was eliminated all over the surface of the wafer (Japanese Patent Application Laid-open (kokai) No. 8-330316). Further, they proposed that such a wafer can be produced when controlling P/G value is controlled to 0.20-0.22 mm.sup.2 /.degree. C. min, in which P is a pulling rate (mm/min), and G is an average intra-crystal temperature gradient (.degree. C./mm) along the pulling direction (.degree. C./mm).
They stated therein that a ring OSF converges to the center of a wafer when P/G is 0.22 mm.sup.2 /.degree. C. min. This value is 1.7 times as large as the value according to Von Ammon et al. mentioned above. According to the presentation by Nakamura et al., Pcrit/G is 0.15 mm.sup.2 /.degree. C. min (Japan crystal growth committee journal, Vol.24, No.4, p22, 1997). As described above, the value of Pcrit/G varies widely depending on presenters.
It is not sure that the wafer proposed by Hourai et al. can be actually produced. However, it is the fact that there is a region where none of dislocation cluster and FPD exists on the outside of the ring OSF, as shown in a photograph (See FIG. 1) disclosed in 1993, as mentioned above.
As described above as a recent technology for reduction and elimination of grown-in defects due to vacancies and interstitial silicon atoms, a crystal defect in a crystal having seriously important effects on a device than before is an oxide precipitate, and therefore the technology of controlling it is important in a device processing. Recently, a device heat process tends to be conducted at lower temperature, and thus it is more important to control the density of the oxide precipitate.
Since a quartz crucible is used in CZ method, oxygen is dissolved in a silicon melt from the quartz crucible, and then incorporated in the crystal, which is supersaturated on cooling of the crystal, resulting in aggregation of oxygen. Aggregation is accelerated most around 650.degree. C. and around 500.degree. C. Accordingly, nuclei formation of the oxide precipitates is affected by low temperature thermal history on cooling the crystal, and thus an upper part and a lower part of the grown crystal are significantly different in density of nuclei of oxide precipitate. Of course, the density of nuclei of oxide precipitate depends on a concentration of supersaturated oxygen incorporated in the crystal, and is increased with increase thereof. Accordingly, precise control of the supersaturated oxygen concentration is required in manufacture of a wafer.
The nuclei of oxide precipitate formed while producing crystal grows a larger oxide precipitate, as supersaturated oxygen precipitates on the nuclei during a device thermal process. The oxide precipitate plays an important role of gettering of heavy metal impurity from outside such as an apparatus during a device fabrication process. On the other hand, when the precipitates are formed in high density, they are present also in or near a device active layer, and may cause a junction leakage failure. In a conventional thermal process, high temperature treatment at 1200.degree. C. is performed in a relatively early stage. A considerable amount of nuclei of oxide precipitate formed in manufacture of crystal are dissolved again, so that there is eliminated the difference of density of nuclei of oxide precipitate latently contained in wafers between wafers, namely between crystals or positions of crystals. Recently, heat treatment in an early stage is performed at lower temperature of 1000-1050.degree. C., and thus nuclei of oxide precipitate formed in manufacture of crystal is not dissolved, but grows. Control of density of nuclei of oxide precipitate is therefore getting more important. Accordingly, there is a need for the invention relating to suppress deviation of density of nuclei of oxide precipitate between wafers which is formed in manufacture of crystal.
As described above, when the pulling rate is lowered, the diameter of the ring OSF gets small. Accordingly, it is well known for the person skilled in the art of manufacture of the crystal in the manufacturer of crystal that a ring OSF converges to the center of a wafer and disappears. It is also known that a void which is an agglomerate of vacancies is formed as a grown-in defect. Furthermore, it is also known as presented by Hourai et al., that LEP (dislocation loop and cluster thereof) which is an agglomerate of interstitial silicon atoms is formed on the outside of a ring OSF. Hourai et al. evolve the finding that there is a region where the grown-in defect, FPD, is not present between peripheral portion of the ring OSF and LEP region outside thereof, and suggest enlarging the region all over the surface of the wafer.
According to the invention of Hourai et al., the method of enlarging the region having no defect all over the surface of the wafer or throughout the crystal is defined by the range of P/G, and G cannot be general value in the manufacturers of crystal, since C is not an actual value on growing crystals, but a value according to total heat transmission analysis simulation. As described above, it is backed up by the fact that Pcrit/G value at which the ring 0SF converges to the center of a wafer varies depending on organizations. G varies depending on simulation software developed by each organization and commercially available simulation software (for example a software called "FEMAC"; F. Dupret et al; Journal of Heat transfer, vol. 33, p. 1849, 1990). G varies also depending on a way of making finite element mesh, the condition of boundary, and the way of defining gradient.
Accordingly, the value P/G is not suitable for the variable which is to be controlled in general and interoperable way during crystal growing. Generally, G is not a variable to be controlled during crystal growing, but a parameter given for a heat insulating structure within the furnace, which is difficult to be altered or controlled during pulling crystal. Absolute value thereof is not general nor interoperable, and thus G determined by simulation should be used as a relative value in each organization. On the other hand, a pulling rate is a common variable among any organizations, and is controlled actually, so that it is suitable as a variable.
There is neither theory nor experimented facts that completely contradict the theory of Voronkov that a type and an amount of excessive point defects depend on P/G value. However, the theory provides neither a specific critical value at which types of point defect is transited, nor P/G value at which a grown-in defect which is an agglomerate of point defects generates. Even if there can be provided results of experiment that a transition point is determined only by P/G value, it is quite difficult to prove that it transits at the same P/G value for any heat insulating structures within the furnace. Because, G value varies depending on analyzing organization, and is not interoperable nor general.
Under the circumstance, if there can be found a general method determining a boundary between a region of forming grown-in defects and a region having no defects not by P/G value but by a pulling rate P, it will be quite effective in actual crystal manufacturing, and it will be interoperable among organizations, as it is a general method, and furthermore it will be simple and practical.
As mentioned above, Hourai et al evolve the finding that there is a region where the grown-in defect, FPD, is not present between peripheral portion of the ring OSF and LEP region outside thereof, and suggest enlarging the region all over the surface of the wafer. However, oxygen precipitation behavior in the region is not clarified.
If the transition point of excessive point defects is in the region having no defect, there exists a region having excess vacancies in the region having no defect, which may results in extroadinaly large amount of precipitated oxygen. Because, amount of precipitated oxygen depends on density of excess vacancies and density of excess interstitial silicon atoms.
As shown in the following formula, generation of oxide precipitate (for example, SiO.sub.2) is promoted when the density of vacancy is excessive, and suppressed when the density of interstitial silicon atom is excessive. EQU 2xOi+ySi+zV{character pullout}xSiO.sub.2 +(y-z-x)I
wherein Oi represents interstitial oxygen atom, Si represents a silicon atom at a lattice point, V represents vacancy, I represents interstitial silicon atom, each of x, y and z represents a concentration.
It can be proved qualitatively as follows. When oxide precipitate is formed in silicon mother crystal, the volume is expanded to 2.25 times. Interstitial silicon atoms are liberated to correct the lattice distortion thus generated. If excess vacancies are present, oxygen precipitation can be accelerated, as the liberated interstitial silicon atoms can be absorbed. If excess interstitial silicon atoms are present, oxygen precipitation is suppressed, as the liberated interstitial silicon atoms are not absorbed.
The region wherein oxygen precipitation is accelerated and the region wherein oxygen precipitation is suppressed may be different in deviation of an amount of precipitated oxygen. Namely, it is predicted that the former is easily affected by thermal history, and the latter is hardly affected by thermal history.
From the aspect of designing device process, difference in density of oxide precipitates is one of problems which are should be avoided most. It is necessary to avoid deviation of density of oxide precipitates among wafers.